In recent years, certain materials including but not limited to ruthenium and its oxides or platinum or the like are thought to be the top-rated candidates for the capacitor electrode material of semiconductor devices of the next generation, owing to congeniality with currently available capacitor dielectric films high in dielectric constant and the like. In addition, materials which are considered to be employable as gate dielectric films in place of silicon oxides may include zirconium oxides and hafnium oxides or else whereas PZT (Pb(Zr,Ti)O3) and BST ((Ba,Sr)Tio3) are being considered for use as capacitor dielectric films. In this way, various kinds of “new” materials are under consideration for use as prospective semiconductor device materials. Unfortunately these new materials are thermally and chemically stable in nature and thus stay extremely low in volatility—in this respect, these are called non-volatile materials among experts in the semiconductor device art.
It is thus inevitable for performing etching treatment of these nonvolatile materials to maintain the temperature of a wafer being presently processed at high temperatures. Although in prior known etch processing apparatus or equipment it is a standard way that the wafer temperature is set to range from a low temperature of approximately −50° C. up to about 100° C., this temperature range is deemed insufficient in order to successfully etch the above nonvolatile materials due to the chemical stability thereof. Thus it is required that the nonvolatile materials be processed or micromachined within a high temperature range of from 200° C. to 500° C.
To realize a processing apparatus for processing wafers at such high temperatures, it is essential to employ a wafer stage capable of not only heating up wafers at high temperatures but also performing temperature control for establishment of a uniform wafer temperature distribution while increasing responsibility even in cases where heat input from a plasma is present.
A method for controlling the temperature of a wafer being processed with good responsibility is disclosed in Published Japanese Patent Application No. 7-176601 (JP-A-7-176601), wherein a gas gap space is provided between a pedestal for support of a wafer and its associative heat source and heat sink being provided thereunder for controlling the pressure of a gas being introduced into this gas gap space to thereby control the wafer temperature.
Another approach is disclosed in JP-A-2001-110885, wherein a heat transfer gas chamber capable of sealing and exhausting gases is provided between a support member for holding a wafer and a cooling member for performing cooling while further providing a heating element(s) on the support member side to thereby maintain the wafer at a high temperature.